Improving SYCL portability with GPUs, CPUs, FPGAs, and other accelerators.

Discover performance techniques for using SYCL to optimize acceleration for HPC systems.

Modern computing architectures—with multiple CPUs, GPUs, FPGAs, and other accelerators—offer challenges to developers intent on achieving high performance and productivity. This workshop focuses on coding techniques with SYCL that take advantage of existing accelerators and boost performance in HPC systems, maximizing portability across diverse platforms.

With the Intel® Tiber™ AI Cloud, developers gain hands-on experience featuring the latest Intel® hardware and software, including a comprehensive open ecosystem environment and a complement of CPUs and GPUs. Developers are encouraged to access their own Nvidia or AMD GPU system—with the Intel® oneAPI Base Toolkit installed—to run SYCL code comparatively on these systems.

The session includes these topics:

Using SYCL code to target different devices and modify environment variables
Retrieving device properties, optimizing SYCL kernels for various offload devices
Installing the oneAPI plugin that lets you build code for Nvidia or AMD GPUs
Offloading SYCL code and GPU computations to support different vendors—including Intel, Nvidia, and AMD
Introducing supplemental SYCL development tools, such as Intel® VTune™ Profiler and SYCLomatic

Hands-on demonstrations of coding techniques require an Intel Tiber Developer AI account. If you don’t have one, get one here.

The workshop is geared to intermediate to advanced developers. The session offers the knowledge and expertise to harness SYCL effectively for creating portable code ideal for high performance systems.

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Maximizing SYCL Portability Across High Performance Platforms

Discover performance techniques for using SYCL to optimize acceleration for HPC systems.

Speakers

Rakshith Krishnappa

Praveen Kundurthy