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Tips and Tricks: Next-Level Considerations for CUDA-to-SYCL Migration

Wednesday, February 28, 2024 | 9:00 AM PT

Learn how to assess and implement additional post-migration steps and tune your application for performance portability across different vendor hardware.

 

The initial porting of your application from CUDA to SYCL using the Intel® DPC++ Compatibility Tool or SYCLomatic is quick and straightforward. However, there can be CUDA-specific routines in the original codebase that require extra attention.

This session looks under the hood at the following advanced topics, some or all of which may be necessary to achieve successful CUDA-to-SYCL migration and performance portability for your target GPUs and/or AI accelerators:

  • CUDA performance library mapping to specific oneAPI spec SYCL API libraries
  • CPU offload kernel problem sizing
  • CPU-GPU data caching, data transfer, and memory use optimization
  • Unified Shared Memory vs Buffered Memory
  • SYCL interoperability
  • Resolving use of custom PTX instructions
  • Coexistence with MPI and distributed computing in HPC

Note: It is recommended you have working knowledge of C/C++.

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Skill level: All

Featured software

This session features the following tools, which you can get standalone or as part of the Intel® oneAPI Base Toolkit (Note the Intel DPC++ Compatibility Tool is not available standalone):


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Rob Mueller-Albrecht
Developer SW Products Marketing Manager, Intel

Yantao Zhang
Software Technical Consulting Engineer, Intel

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Achieve High-Performance Parallel Code with Minimal Effort

Wednesday, March 6, 2024 | 9:00 AM PT

Boost algorithm performance in C++ applications with the least effort when targeting an accelerator.

 

Learn how the new features of Intel® oneAPI DPC++ Library (oneDPL)—Parallel STL offload, improved random number generation, and dynamic device selection—offer developers more opportunity to accelerate performance, particularly when targeting hardware accelerators like GPUs.

Key takeaways:

  • An overview of oneDPL, e.g., how it provides APIs to boost productivity and performance, its optimized implementations of ISO C++ algorithms, and more
  • How to write code in a composable, portable, and scalable way
  • Increasing productivity by using abstraction
  • Using the latest oneDPL features to target an accelerator

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Skill level: Intermediate

Featured software


Download code samples


 
Ruslan Arutyunyan
Middleware Development Engineer, Intel

Pablo Reble
Software Engineer, Intel

Dan Hoeflinger
Middleware Development Engineer, Intel

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How to Set Up Cloud-based Distributed Training to Fine-tune an LLM

Wednesday, March 27, 2024 | 9:00 AM PT

Learn how to fine-tune the nanoGPT model on a cluster of CPUs on Google Cloud Platform service using an Intel-optimized cloud module.

 

Intel offers a set of cloud-native open source reference architectures to help AI cloud developers build and deploy solutions on AWS, Microsoft Azure, and GCP service.

This session is focused on GCP-based model training. You will:

  1. Get an overview of how to fine-tune the 12M-parameter nanoGPT model—building upon the initial codebase by Andrej Karpathy—on a cluster of Intel® Xeon® Scalable processors and;
  2. Then learn how to set up distributed training so you can fine-tune the resulting base LLM to your specific objective, i.e., on your specific task and dataset.

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Skill level: Intermediate

Featured software


 
Ben Consolvo
AI Solutions Engineer Manager, Intel

Eduardo Alvarez
Senior AI Solutions Engineer, Intel

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